|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
(R) TDA7430 TDA7431 DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX AND VOICE CANCELLER 1 STEREO (4 STEREO) INPUT + 1 MIXER INPUT INPUT ATTENUATION CONTROL IN 0.5dB STEP VOICE CANCELLER IS AVAILABLE TREBLE MIDDLE AND BASS CONTROL THREE SURROUND MODES ARE AVAILABLE: - MUSIC: 4 SELECTABLE RESPONSES - MOVIE AND SIMULATED: 256 SELECTABLE RESPONSES 2 SPEAKER AND 2 RECORD ATTENUATORS: - 2 INDEPENDENT SPEAKERS AND 2 INDEPENDENT RECORD CONTROL IN 1dB STEP FOR BALANCE FACILITY - AVAILABILITY OF LOUDSPEAKER EQUALIZATION FIXED BY EXTERNAL COMPONENTS - INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS DESCRIPTION The TDA7430/7431 are volume tone (bass middle and treble) balance (Left/Right) processors with PIN CONNECTIONS PS4 PS3 PS2 PS1 LP LP1 HP1 HP2 VOUTREF VAR_L BASSO_L VAR_R BASSO_R BASS_LO BASS_LI BASS_RO BASS_RI MIDDLE_LO MIDDLE_LI MIDDLE_RO MIDDLE_RI 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 D95AU219B SDIP42 TQFP44 ORDERING NUMBERS: TDA7430 (TQFP44) TDA7431 (SDIP42) voice canceller for quality audio applications in car radio and Hi-Fi systems. They reproduce surround sound by using programmable phase shifters and a signal matrix. Control of all the functions is accomplished by serial bus. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. Thanks to the used BIPOLAR/CMOS Technology, Low Distortion, Low Noise and DC stepping are obtained. MIDDLE_LO MIDDLE_RO MIDDLE_RI MIDDLE_LI TREBLE_R TREBLE_L BASS_RO 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 VS CREF NBRO NBRIN LPVC R_IN MIX L_IN NBLIN NBLO RECOUT_L RECOUT_R L_OUT R_OUT DIG_GND SCL SDA ADDR AGND TREBLE_L TREBLE_R R_IN4 R_IN3 R_IN2 CREF PS1 PS2 PS3 44 43 42 41 40 39 38 37 36 35 34 LP1 HP1 HP2. REAROUT REARIN VAR_L BASSO_L VAR_R BASSO_R BASS_LO BASS_LI 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 BASS_RI AGND SDA SCL 33 32 31 30 29 28 27 26 25 24 23 R_IN1 MIX L_IN1 L_IN2 L_IN3 L_IN4 RECOUT_L RECOUT_R L_OUT R_OUT DIG_GND VS LP LPVC D95AU220B PS4 September 1999 1/21 MIDDLE-LI LP1 43 RPS1 FIX RPS2 RPS3 RPS4 RM RB 30K 42 41 40 19 15 14 11 10 7 6 HP1 HP2 PS1 BASS-LI PS2 PS3 PS4 TREBLE-L MIDDLE-LO AGND CREF REARIN REAROUT MIDDLE-RI MIDDLE-RO 2.2F 5.6nF MIX-IN 18nF 2.7K 22nF 100nF 5.6K 100nF THE SWITCHES POSITION MATCHES THE RESET CONDITION BASS-RO 100nF 22F 1.2nF 1F BASS-RI 2/21 100nF 2.2F 4.7nF 22nF 22nF 5.6nF 2.7K 18nF 100nF 5.6K 22nF 100nF BASS-LO BASSO-L VAR-L 27 OFF R5 R6 + + MOVIE/ MUSIC OFF MOVIE/SIM BASS MIXING AMP TREBLE MIDDLE 3BAND SIM MUSIC REAR MUTE SURR SURR REC ATT VAR 79dB CONTROL 79dB CONTROL + FIX SPKR ATT MUTE PS1 90Hz PS2 4KHz PS3 400Hz PS4 400Hz RECOUT-L 25 L-OUT + I2 C BUS DECODER + LATCHES L-R 22 21 23 SCL SDA DIG GND LPF 9KHz SURR 3BAND VOICE ON OFF REAR SURR 50K 44 LP TREBLE-R 4 5 18 17 RM 16 13 RB 12 MUTE 79dB CONTROL BASSO-R 9 8 VAR-R D95AU221B TDA7430 - TDA7431 5.6nF 680nF BLOCK DIAGRAM (TDA7430) 0.47F 31 1 31.5dB control 2 3 L-IN1 50K 0.47F 30 RLP1 RHP1 L-IN2 50K 0.47F 29 L-IN3 50K 0.47F 28 L-IN4 50K + 0.47F 33 R-IN1 50K EFFECT CONTROL MIXING AMP TREBLE MIDDLE BASS FIX FIX VAR + MUTE REC ATT 79dB CONTROL SPKR ATT 0.47F 35 + R-IN2 50K - 0.47F 36 24 R-OUT R-IN3 50K 0.47F LPF + 37 100K SUPPLY Vref R-IN4 26 30K 50K 31.5dB control RECOUT-R 34 39 VS 20 38 32 LPVC MIX 2.2F 5.6nF NB-LB NBLO 2.2F VAR-L NBLIN NB2 34 30K FIX MIDDLE-LI MIDDLE-LO 680nF 100nF 4.7nF 22nF 22nF 5.6nF 22nF 2.7K 18nF 100nF NB1 NB-LA 5.6K 100nF LP1 4 23 RM RB 19 14 11 10 33 18 15 RPS1 RPS2 RPS3 RPS4 3 2 1 HP1 HP2 PS1 PS2 PS3 PS4 TREBLE-L BASS-LI BASS-LO BASSO-L 6 7 8 BLOCK DIAGRAM (TDA7431) 0.47F 31.5dB control 35 L-in 50K PS1 90Hz OFF SURR REC ATT VAR REAR MUTE FIX MIXING AMP TREBLE MIDDLE BASS 3BAND 79dB CONTROL PS2 4KHz PS3 400Hz PS4 400Hz RLP1 RHP1 32 RECOUT-L R5 79dB CONTROL + MUTE SPKR ATT R6 SURR MUSIC SIM - 30 L-OUT + + MOVIE/ MUSIC OFF MOVIE/SIM - L-R 27 26 I2C BUS DECODER + LATCHES 28 25 SCL SDA DIG GND ADDR + + + LPF 9KHz SURR 3BAND OFF REAR Vref SURR MUTE 5 9 VOUTREF 22F 5.6nF TREBLE-R 22 LP AGND CREF VS 1.2nF 42 24 41 21 RM 20 17 RB 16 79dB CONTROL BASSO-R BASS-RI 13 12 30K 39 40 EFFECT CONTROL MIXING AMP TREBLE MIDDLE BASS FIX FIX VAR + MUTE REC ATT 79dB CONTROL SPKR ATT 29 R-OUT - 0.47F LPF + VOICE ON 37 R-in SUPPLY 31 RECOUT-R 50K 31.5dB control 100K 38 36 LPVC MIX VAR-R MIDDLE-RI MIDDLE-RO MIX-IN 18nF 2.7K 22nF 100nF 5.6K 100nF BASS-RO 100nF 1F 2.2F NB-RA NB4 NBRIN NB-RB THE SWITCHES POSITION MATCHES THE RESET CONDITION NBRO NB3 D95AU222C TDA7430 - TDA7431 3/21 TDA7430 - TDA7431 THERMAL DATA Symbol R th j-pins Thermal Resistance Junction-pins Description Ma x. Value 85 Unit C/W ABSOLUTE MAXIMUM RATINGS Symbol VS T amb Tstg Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Parameter Value 11 -10 to 85 -55 to +150 Unit V C C QUICK REFERENCE DATA Symbol VS VCL THD S/N SC Supply Voltage Max. input signal handling Total Harmonic Distortion V = 1Vrms f = 1KHz Signal to Noise Ratio V out = 1Vrms (mode = OFF) Channel Separation f = 1KHz Treble Control (2db step) -14 -14 -14 -79 100 Middle Control (2db step) Bass Control (2dB step) Balance Control Mute Attenuation 1dB step (LCH, RCH) Parameter Min. 7 2 0.01 106 90 +14 +14 +14 0 0.1 Typ. 9 Max. 10.2 Unit V Vrms % dB dB dB dB dB dB dB 4/21 TDA7430 - TDA7431 TEST CIRCUIT (TDA7430) 2.2F 2.2F 2.2F 0.47F 0.47F R-IN3 37 36 0.47F R-IN2 35 MIX 32 R-IN1 0.47F 1F BASSO-R 22nF PS4 22nF 40 9 VAR-R 8 BASSO-L 7 VAR-L 6 REAROUT 4 REARIN 5 R-IN4 PS3 41 33 0.47F 31 L-IN1 0.47F 4.7nF PS2 42 100nF PS1 1.2nF LP 5.6nF 44 29 43 30 L-IN2 L-IN3 0.47F 0.47F 28 L-IN4 VS 39 LP1 1 5.6nF TREBLE-R 18 5.6nF TREBLE-L 100nF 19 TDA7430 38 10F 22F 100nF CREF LPVC 34 220nF 100nF 10 BASS-LO 100nF 11 BASS-LI 100nF 22nF MIDDLE-LO 18nF MIDDLE-LI 2.7K 22nF 16 18nF MIDDLE-RO 17 27 RECOUT-L D95AU225B 14 15 5.6K BASS-RO 12 100nF 13 26 RECOUT-R 25 L-OUT 24 R-OUT 23 DIG-GND 22 SCL 21 SDA 20 AGND HP2 3 HP1 2 BASS-RI 5.6K MIDDLE-RI 2.7K 680nF TEST CIRCUIT (TDA7431) 2.2F 2.2F 680nF 0.47F 1F MIX 37 36 0.47F L-IN 35 42 VS 10F 100nF 22F 41 CREF 220nF 22nF BASSO-R PS4 1 13 VAR-R 12 BASSO-L 11 VAR-L 10 HP2 8 HP1 7 R-IN 22nF PS3 2 4.7nF PS2 3 100nF PS1 1.2nF 4 40 NBRO 15K LP 220nF 5 39 NBRIN 7.5K 220nF 5.6nF LP1 5.6nF 6 TREBLE-R 22 TDA7431 34 NBLIN 15K 5.6nF TREBLE-L 100nF 23 33 220nF NBLO LPVC 38 100nF 14 18 15 BASS-LO 100nF 19 BASS-LI 100nF 7.5K 22nF MIDDLE-LO 18nF MIDDLE-LI 2.7K 22nF 20 18nF MIDDLE-RO 21 9 VOUTREF 32 RECOUT-L 31 RECOUT-R 30 L-OUT 29 R-OUT 28 DIG-GND 27 SCL 26 SDA 25 ADDR 17 24 16 BASS-RO 5.6K 100nF BASS-RI 5.6K AGND MIDDLE-RI 2.7K D95AU224B 5/21 TDA7430 - TDA7431 ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25C, VS = 9V, RL = 10K, Vin = 1Vrms; RG = 600, all controls flat (G = 0dB), Effect Ctrl = -6dB, MODE = OFF; f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit SUPPLY VS IS SVR Supply Voltage Supply Current Ripple Rejection LCH / RCH out, Mode = OFF 7 10 60 9 18 80 10.2 26 V mA dB INPUT STAGE R IN V CL C RANGE AVMIN AVMAX ASTEP VDC AVO1 AVO2 AVO3 RLPV RMIX Input Resistance Clipping Level Control Range Min. Attenuation Max. Attenuation Step Resolution DC Steps Voice Canceler Output 1 Voice Canceler Output 2 Voice Canceler Output 3 Low Pass Filter Resistance Input Impedance adjacent att. step LIN = RIN, RIN = ON, Vmix = 0V FIX, 0dB attenuation LIN = RIN = 0V Vmix = 1Vrms FIX, 0dB attenuation LIN = -RIN, Vmix = 0V FIX, 0dB attenuation -3 5 -1 5 22.4 70 -1 31 THD = 0.3% 35 2 50 2.5 31.5 0 31.5 0.5 0 6 0 6 32 100 1 32 1 3 7 1 7 41.6 130 65 K Vrms dB dB dB dB mV dB dB dB K K BASS CONTROL Gb BSTEP RB Control Range Step Resolution Internal Feedback Resistance Max. Boost/cut +11.5 1 32 +14.0 2 44 +16.0 3 56 dB dB K MIDDLE CONTROL Gm M STEP RM Control Range Step Resolution Internal Feedback Resistance Max. Boost/cut +11.5 1 17.5 +14.0 2 25 +16.0 3 32.5 dB dB K TREBLE CONTROL Gt TSTEP Control Range Step Resolution Max. Boost/cut +13.0 1 +14.0 2 +15.0 3 dB dB EFFECT CONTROL C RANGE SSTEP Control Range Step Resolution - 21 0.5 1 -6 1.5 dB dB 6/21 TDA7430 - TDA7431 ELECTRICAL CHARACTERISTICS (continued) SURROUND SOUND MATRIX TEST CONDITION (Phase Resistor Selection D0=0, D1=1, D2=0. D3=1, D4=0, D5=1, D6=0, D7=1 Symbol GOFF Parameter In-phase Gain (OFF) Test Condition Mode OFF, Input signal of 1kHz, 1.4 Vp-p, Rin Rout Lin Lout Mode OFF, Input signal of 1kHz, 1.4 Vp-p R in Rout, Lin Lout Movie mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p R in Rout, Lin Lout Movie mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin Rout) - (Lin Lout) Music mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin Rout), (Lin Lout) Music mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin Rout) - (Lin Lout) Simulated Mode, EffectCtrl = -6dB Input signal of 250Hz, 1.4 Vp-p, Rin and Lin Lou t Simulated Mode, EffectCtrl = -6dB Input signal of 1kHz, 1.4 Vp-p, Rin and Lin Lou t Simulated Mode, EffectCtrl = -6dB Input signal of 3.6kHz, 1.4 Vp-p, Rin and Lin Lou t Simulated Mode, EffectCtrl = -6dB Input signal of 250Hz, 1.4 Vp-p, Rin and Lin R out Simulated Mode, EffectCtrl = -6dB Input signal of 1kHz, 1.4 Vp-p, Rin and Lin R out Simulated Mode, EffectCtrl = -6dB Input signal of 3.6kHz, 1.4 Vp-p, Rin and Lin Rout 7 42 7 Min. -1 Typ. 0 Max. 1 Unit dB D GOFF LR In-phase Gain Difference (OFF) In-phase Gain (Movie) -1 0 1 dB GMOV 8 dB DGMOV LR In-phase Gain Difference (Movie) In-phase Gain (Music) 0 dB GMUS 7 dB D GMUS LR In-phase Gain Difference (Music) Simulated L Output 1 0 dB LMON1 4.5 dB LMON2 Simulated L Output 2 -4.0 dB LMON3 Simulated L Output 3 7.0 dB R MON1 Simulated R Output 1 - 4.5 dB R MON2 Simulated R Output 2 3.8 dB R MON3 Simulated R Output 3 - 20 dB RLP1 R HPI RLPF Low Pass Filter Resistance High Pass Filter Resistance LP Pin Impedance 10 60 10 13 78 13 K K K 7/21 TDA7430 - TDA7431 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit SURROUND SOUND MATRIX PHASE R PS10 R PS11 R PS12 R PS13 R PS20 R PS21 R PS22 R PS23 R PS30 R PS31 R PS32 R PS33 R PS40 R PS41 R PS42 R PS43 Phase Shifter 1: D1 = 0, D0 = 0 Phase Shifter 1: D1 = 0, D0 = 1 Phase Shifter 1: D1 = 1, D0 = 0 Phase Shifter 1: D1 = 1, D0 = 1 Phase Shifter 2: D3 = 0, D2 = 0 Phase Shifter 2: D3 = 0, D2 = 1 Phase Shifter 2: D3 = 1, D2 = 0 Phase Shifter 2: D3 = 1, D2 = 1 Phase Shifter 3: D5 = 0, D4 = 0 Phase Shifter 3: D5 = 0, D4 = 1 Phase Shifter 3: D5 = 1, D4 = 0 Phase Shifter 3: D5 = 1, D4 = 1 Phase Shifter 4: D7 = 0, D6 = 0 Phase Shifter 4: D7 = 0, D6 = 1 Phase Shifter 4: D7 = 1, D6 = 0 Phase Shifter 4: D7 = 1, D6 = 1 8.3 10 12.6 26.4 4 4.8 6 12.9 8.5 10.2 12.7 27.4 8.5 10.2 12.7 27.4 11.8 14.1 17.9 37.3 5.6 6.8 8.4 18.3 12.1 14.5 18.1 39.1 12.1 14.5 18.1 39.1 15.2 18.3 23.3 48.85 7.2 8.7 10.9 23.7 15.6 18.7 23.3 50.75 15.6 18.7 23.3 50.75 K K K K K K K K K K K K K K K K SPEAKER & RECORD ATTENUATORS Crange SSTEP EA VDC AMUTE RVEA Control Range Step Resolution Attenuation set error DC Steps Output Mute Condition Input Impedance Av = 0 to -20dB Av = -20 to -79dB adjacent att. steps -0.5 -1.5 -3 -3 +70 21 79 1 0 0 0 100 30 39 1.5 1.5 2 3 dB dB dB dB mV dB K Vrms Vrms Vrms mVrms Vrms 0.1 % dB Vrms 70 V AUDIO OUTPUTS NO(OFF) NO(MOV) NO(MUS) N O(MON) d SC VOCL ROUT VOUT Output Noise (OFF) Output Noise (Movie) Output Noise (Music) Output Noise (Simulated) Distorsion Channel Separation Clipping Level Output Resistance DC Voltage Level d = 0.3% Output Mute, Flat BW = 20Hz to 20KHz Mode =Movie , BW = 20Hz to 20KHz Mode = Music , BW = 20Hz to 20KHz, Mode = Simulated, BW = 20Hz to 20KHz Av = 0 ; Vin = 1Vrms 70 2 10 4 5 30 30 30 0.01 90 2.5 40 3.8 BUS INPUTS V IL VIH IIN VO Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge IO = 1.6mA 3 -5 +5 0.4 1 V V A V 8/21 TDA7430 - TDA7431 I2C BUS INTERFACE Data transmission from microprocessor to the TDA7430/TDA7431 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown in fig. 3, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown in fig.4 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an ac2 Figure 3: Data Validity on the I CBUS knowledge bit. The MSB is transferred first. Acknowledge The master (P) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 5). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Transmission without Acknowledge Avoiding to detect the acknowledge of the audioprocessor, the P can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking. Figure 4: Timing Diagram of I2CBUS Figure 5: Acknowledge on the I2CBUS 9/21 TDA7430 - TDA7431 SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (S) A chip address byte, containing the TDA7430 /TDA7431 address A subaddress bytes A sequence of data (N byte + achnowledge) A stop condition (P) CHIP ADDRESS MSB S 1 0 0 0 0 0 A LSB 0 ACK MSB B SUBADDRESS LSB DATA ACK MSB DATA 1 to DATA n LSB DATA ACK P D95AU226A ACK = Achnowledge S = Start P = Stop A = Address B = Auto Increment EXAMPLES No Incremental Bus The TDA7430 /TDA7431 receives a start condi- tion, the correct chip address, a subaddress with the MSB = 0 (no incremental bus), N-datas (all these datas concern the subaddress selected), a stop condition. CHIP ADDRESS MSB S 1 0 0 0 0 0 A LSB 0 ACK MSB 0 X SUBADDRESS LSB X X D3 D2 D1 D0 ACK MSB DATA LSB DATA ACK P D95AU306 Incremental Bus The TDA7430 /TDA7431 receive s a start condition, the correct chip address, a subaddress with the MSB = 1 (incremental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS from "1XXX1010" to "1XXX1111" of DATA are ignored. The DATA 1 concern thesubaddress sent, and the DATA 2 concern the subaddress sent plus one in the loop etc, and at the end it receivers the stop condition. CHIP ADDRESS MSB S 1 0 0 0 0 0 A LSB 0 ACK MSB 1 X SUBADDRESS LSB X X D3 D2 D1 D0 ACK MSB DATA 1 to DATA n LSB DATA ACK P D95AU307 10/21 TDA7430 - TDA7431 DATA BYTES Address = 80(HEX): ADDR open; 82 (HEX): need to connect supply FUNCTION SELECTION: The first byte (subaddress) MSB D7 B B B B B B B B B B D6 X X X X X X X X X X D5 X X X X X X X X X X D4 X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 D2 0 0 0 0 1 1 1 1 0 0 D1 0 0 1 1 0 0 1 1 0 0 LSB D0 0 1 0 1 0 1 0 1 0 1 INPUT ATTENUATION SURROUND & OUT & EFFECT CONTROL PHASE RESISTOR BASS & NATURAL BASE MIDDLE & TREBLE SPEAKER ATTENUATION "L" SPEAKER ATTENUATION "R" RECORD ATTENUATION "L" RECORD ATTENUATION"R" INPUT MULTIPLEXER, VOICE CANCELLER & REC OUT SUBADDRESS B = 1 incremental bus; active B = 0 no incremental bus; X = indifferent 0,1 INPUT ATTENUATION SELECTION MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 INPUT ATTENUATION 0.5 dB STEPS 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 4 dB STEPS 0 -4 -8 -12 -16 -20 -24 -28 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 INPUT ATTENUATION = 0 -31.5dB D7 D6 0 1 D5 D4 D3 D2 D1 D0 REAR SWITCH REARIN, REAROUT PIN ACTIVE NO REARIN, REAROUT PIN 11/21 TDA7430 - TDA7431 SURROUND SELECTION MSB D7 D6 D5 D4 D3 D2 D1 0 0 1 1 LSB D0 0 1 0 1 SURROUND MODE SIMULATED MUSIC OFF MOVIE OUT VAR FIX EFFECT CONTROL -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 PHASE RESISTOR SELECTION MSB D7 D6 D5 D4 D3 D2 D1 0 0 1 1 LSB D0 0 1 0 1 SURROUND PHASE RESISTOR PHASE SHIFT 1 (K) 12 14 18 37 PHASE SHIFT 2 (K) 6 7 8 18 PHASE SHIFT 3 (K) 12 14 18 39 PHASE SHIFT 4 (K) 12 14 18 39 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 12/21 TDA7430 - TDA7431 BASS SELECTION MSB D7 D6 D5 D4 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 D1 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 LSB D0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 BASS 2 dB STEPS -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14 NATURAL BASE NBRIN, NBRO, NBLIN, NBLO PIN ACTIVE NO NBRIN, NBRO, NBLIN, NBLO PIN 0 1 SPEAKER/RECORD ATT. R & L SELECTION MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 SPEAKER/RECORD ATT 1 dB STEPS 0 -1 -2 -3 -4 -5 -6 -7 8 dB STEPS 0 -8 -16 -24 -32 -40 -48 -56 -64 -72 MUTE 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 X 0 1 0 1 0 1 0 1 0 1 X X X = INDIFFERENT 0,1 SPEAKER/RECORD ATTENUATION = 0dB -79dB 13/21 TDA7430 - TDA7431 MIDDLE & TREBLE SELECTION MSB D7 D6 D5 D4 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 D1 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 LSB D0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 MIDDLE 2 dB STEPS -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14 TREBLE 2 dB STEPS 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14 14/21 TDA7430 - TDA7431 VOICE CANCELLER/INPUT/RECOUT L & R SELECTION MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 VOICE CANCELLER OFF ON INPUT MULTIPLEXER IN2 IN3 IN4 IN1 REC OUT "L" VER 1 (3BAND) VER 2 (SURR) VER 3 (REAR) FIX REC OUT "R" VER 1 (3BAND) VER 2 (SURR) VER 3 (REAR) FIX POWER ON RESET BASS & MIDDLE TREBLE SURROUND & OUT CONTROL+ EFFECT CONTROL SPEAKER/RECORD ATTENUATION L &R INPUT ATTENUATION + REARN SWITCH NATURAL BASE VOICE CANCELER INPUT 2dB 0dB OFF + FIX + MAX ATTENUATION MUTE MAX ATTENUATION + ON OFF OFF IN1 PIN: L-OUT, R-OUT, RECOUT-L, RECOUT-R VS 20A 100 GND D94AU204 15/21 TDA7430 - TDA7431 PIN: HP1 PIN: HP2 LP1 VS 10K VS 20A 5.5K 60K GND D94AU198 60K GND D94AU199 HP2 HP1 5.5K PIN: L-IN, R-IN, L-IN2, R-IN2, L-IN3, R-IN3, L-IN4, R-IN4, PIN: VER-L, VER-R, VS 20A VS 20A SW 50K GND 30K D94AU200 VREF GND Vref D95AU227 PIN: CREF PIN: LP1 VS 20K 42K 20A VS 20A 20K GND 10K D95AU336 GND HP1 D94AU211 16/21 TDA7430 - TDA7431 PIN: SCL, SDA PIN: PS1, PS2, PS3, PS4 LP VS 20A 20A GND D94AU205 GND D95AU308 PIN: ADDR PIN: REARIN VS 20A VS 20A SW 50K GND GND D95AU228A 50K GND Vref D95AU229 PIN: MIX PIN: REAROUT, BASSO-L, BASSO-R VS 20A VS 20A 100K GND Vref D94AU123 GND D95AU230 17/21 TDA7430 - TDA7431 PIN: BASS-LI,BASS-RI, MIDDLE-LI, MIDDLE-RI, PIN: BASS-LO,BASS-RO,MIDDLE-LO,MIDDLE-RO, VS 20A VS 20A (*) GND BASS-LO 45K : Bass or 25K : MIDDLE D95AU231A GND BASS-LI,BASS-RI,MIDDLE-LI,MIDDLE-RI (*) 45K : Bass 25K : MIDDLE D95AU232 BASS-RO,MIDDLE-LO,MIDDLE-RO PIN: TREBLE-L, TREBLE-R VS 20A PIN: VOUT REF VS 20A 25K GND GND D95AU233A 10K D95AU309 GND PIN: NBLIN, NBRIN PIN: NBLO, NBRO VS 20A VS VREF GND D95AU234 SW GND D95AU235A 18/21 TDA7430 - TDA7431 SDIP42 PACKAGE MECHANICAL DATA DIM. MIN. A A1 A2 B B1 c D E E1 e e1 e2 e3 L 2.54 3.30 0.51 3.05 0.38 0.89 0.23 36.58 15.24 12.70 13.72 1.778 15.24 18.54 1.52 3.56 0.10 0.130 3.81 0.46 1.02 0.25 36.83 4.57 0.56 1.14 0.38 37.08 16.00 14.48 mm TYP. MAX. 5.08 0.020 0.120 0.150 0.180 MIN. inch TYP. MAX. 0.20 OUTLINE AND MECHANICAL DATA 0.0149 0.0181 0.0220 0.035 0.040 0.045 0.0090 0.0098 0.0150 1.440 0.60 0.50 0.540 0.070 0.60 0.730 0.060 0.140 1.450 1.460 0.629 0.570 SDIP42 (0.600") E E1 A1 A2 B B1 e L A e1 e2 D c E 42 22 .015 0,38 Gage Plane 1 21 SDIP42 e3 e2 19/21 TDA7430 - TDA7431 DIM. MIN. A A1 A2 B C D D1 D3 e E E1 E3 L L1 K 0.45 0.05 1.35 0.30 0.09 12.00 10.00 8.00 0.80 12.00 10.00 8.00 0.60 1.00 0.75 0.018 1.40 0.37 mm TYP. MAX. 1.60 0.15 1.45 0.45 0.20 0.002 0.053 0.012 0.004 0.472 0.394 0.315 0.031 0.472 0.394 0.315 0.024 0.039 0.030 0.055 0.014 MIN. inch TYP. MAX. 0.063 0.006 0.057 0.018 0.008 OUTLINE AND MECHANICAL DATA TQFP44 (10 x 10) 0(min.), 3.5(typ.), 7(max.) D D1 A A2 A1 33 34 23 22 0.10mm .004 Seating Plane E1 B 44 1 11 12 E B e C L K TQFP4410 20/21 TDA7430 - TDA7431 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 21/21 |
Price & Availability of TDA7430 |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |